Configuration Structures

A0

Hardware: RPICT3V1; RPICT3T1; RPICT4T4

A1

Hardware: RPICT3V1

A2

Hardware: RPICT3T1 RPICT3V1

struct config_A2_t
{
 char KEY[4];
 byte VERSION = 0xA2;
 byte FORMAT;
 byte NODEID;
 unsigned int POLLING;
 float KCAL[8];
 uint8_t PHASECAL;
 float VEST;
 uint8_t xpFREQ;
 uint8_t N_cycles;
 uint8_t debug;
};

B4

Hardware: RPICT7V1 version 2&3; RPICT8 version 1&3; RPICT4V3 versions 2&3; RPI_LCT4V3

struct config_B4_t
{
 char KEY[4];
 byte VERSION = 0xB4;
 byte FORMAT;
 byte NODEID;
 unsigned int POLLING;
 float KCAL[N_MAX_BOARD][N_SENSORS];
 int8_t PHASECAL;
 float VEST;
 uint8_t xpFREQ;
 uint8_t N_cycles;
 byte N_nodes;
 byte N_channels;
 byte HW_sct[MAX_NODES];
 byte HW_mcp_sct[MAX_NODES];
 byte HW_vol[MAX_NODES];
 byte HW_mcp_vol[MAX_NODES];
 byte CH_type[MAX_CHANNELS_];
 byte CH_id[MAX_CHANNELS_];
 uint8_t debug;
};

C0

Hardware: RPIZ_CT4V3T1

C2

Hardware: RPI_DCV8

struct config_C1_t
{
 char KEY[4];
 byte VERSION = 0xC1;
 byte FORMAT;
 byte NODEID;
 unsigned int POLLING;

 byte N_cvpair;
 float KCAL[N_MAX_BOARD][N_SENSORS];
 int8_t PHASECAL;
 float VEST;
 uint8_t xpFREQ;
 uint8_t N_cycles;
 byte HW_sct[MAX_NODES];
 byte HW_vol[MAX_NODES];

 byte N_node_average;
 uint16_t N_samp_average;
 float K_SENSITIVITY[N_MAX_BOARD][N_SENSORS];
 float K_OFFSET[N_MAX_BOARD][N_SENSORS];
 byte HW_ave[MAX_NODES];

 byte N_channels;
 byte CH_type[MAX_CHANNELS_];
 byte CH_id[MAX_CHANNELS_];
 uint8_t debug;
};

D0

Hardware: Emonwrt3

struct config_D0_t
{
 char KEY[4];
 uint8_t VERSION;
 uint8_t FORMAT;
 uint8_t NODEID;
 unsigned long POLLING;
 float KCAL[N_SENSORS];
 float VEST;
 uint8_t N_nodes;
 uint8_t N_channels;
 uint8_t HW_sct[MAX_NODES];
 uint8_t HW_vol[MAX_NODES];
 uint8_t CH_type[MAX_CHANNELS_];
 uint8_t CH_id[MAX_CHANNELS_];
};